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Bio
Detail-driven verification engineer with strong analytical skills and hands-on UVM and embedded experience. Motivated by complex technical challenges and efficient, high-quality verification.
Skills
Python
C++
C
Node.js
.NET
React
TypeScript
PostgreSQL
Docker
WebSockets
SystemVerilog
UVM
RTL Verification
Assertions
Coverage
Testbench
Cadence Xcelium
Bootcamp Project
Complete UVM-based verification environment for a packet router
Mentored by: Qualcomm
Verification Bootcamp 2025 (Verification)
Responsibilities:
Integrated multiple UVM components into a unified verification environment, including YAPP Input, multiple Channel UVCs, HBUS, and Clock & Reset UVCs, using UVM configuration database, virtual interfaces, and TLM connectivity.
Designed and implemented a coordinated multichannel sequencer to synchronize YAPP and HBUS traffic, enabling complex multi-interface verification scenarios.
Developed a functional reference model driven by HBUS register activity to validate packet attributes and router behavior.
Implemented a TLM-based scoreboard with per-channel FIFOs to verify correct packet routing and data integrity across all output channels.
Authored system-level test sequences combining traffic generation and configuration flows, covering normal operation and error scenarios (invalid addresses, oversize packets, and parity errors).
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Additional Projects
✦ APB Protocol Verification – UVM
SystemVerilog | UVM | AMBA-APB
Developed a UVM-based verification component (UVC) for the AMBA-APB protocol.
Implemented protocol-compliant interface, drivers, monitor, and randomized sequences for read/write transactions.
Integrated the UVC with an APB Slave DUT to verify functional correctness and protocol behavior.
✦ Physics-Based Chess Engine Development
C++ | OpenCV | Multithreading | OOP | Design Patterns | CMake
Developed an interactive chess engine in C++ featuring realistic physics-based behavior for chess pieces.
Implemented real-time graphical rendering using OpenCV and asynchronous task handling via multithreading.
Designed the system using OOP principles and design patterns, with modular build management using CMake.
English Level
Fluent